1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly to a structure of a CMIS semiconductor device using a metal gate electrode.
2. Description of the Related Art
As miniaturization of MISFETs progresses to improve integration and performance of semiconductor devices, it is necessary to reduce a thickness of a gate dielectric (insulating film). However, in a complementary metal-insulator-semiconductor (CMIS) device in which gate length is 50 nm or less, performance improvement is no longer achieved when a conventional polysilicon gate electrode is used. This is because the equivalent SiO2 thickness of the gate dielectric is 2 nm or less in this technical generation and a reduction of gate capacitance becomes obvious due to interfacial depletion of the polysilicon gate electrode. The depletion of the gate electrode is reduced by increasing charge density of the electrode, but the impurity concentration in Si is about 2×1020 cm−3 at the maximum, and a capacitance reduction corresponding to 0.5 nm in the equivalent SiO2 thickness is also caused in this case. This capacitance reduction will be a serious problem in a CMIS technique generation in which the dielectric thickness is 2 nm or less.
Thus, attention is focused on a metal gate technique using a metal as a gate electrode material. Since the metal has high charge density substantially equal to the atomic density, the depletion of the metal gate electrode can be neglected when metal is used as the gate electrode. For the above reasons, it is considered that the introduction of the metal gate electrode will be essential in the CMIS device in the future.
In order to achieve a low threshold voltage in the CMIS device using the metal gate electrode, the work function of the metal which is the gate electrode needs to be about 3.9 to 4.4 eV in an nMISFET and about 4.7 to 5.2 eV in a pMISFET.
Heretofore, means for satisfying this condition has generally been a method which uses different metals for the nMISFET and the pMISFET, and it has been reported that Ti, Ta, TaSiN, Al and the like have a work function suited to the nMISFET and that Mo, Ni, Pt, Ru, RO2, IrO2, TiAlN, TaAlN and the like have a work function suited to the pMISFET (e.g., refer to V. Narayanan VLSI 2004 192 or S. B. Samavedam et at., IEDM 2002 433).
However, when the gate electrodes of the nMISFET and the pMISFET are formed of different metals, it is necessary to individually produce the gate electrodes, which causes the problem that the manufacturing process is complicated and manufacturing costs increase.
At present, methods of individually producing the gate electrodes in an nMISFET and pMISFET include solid phase diffusion, ion implantation, alloying, and total silicidation. However, there are few combinations of metals which can be formed by these methods and which satisfy an optimum condition for the work function of the nMISFET and the pMISFET described above, and in the present circumstances, no metal gate technique is established which facilitates integration in terms of the manufacturing process.
As described above, the gate electrodes of an nMISFET and pMISFET have been formed of different metals in order to introduce the metal gate technique which will be essential in the future, and therefore, there has heretofore been the problem that the manufacturing process is complicated. Thus, it has been desired to realize a CMIS semiconductor device which has the same metal gate for an nMISFET and pMISFET and which makes integration easy.